]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/chv: PPAT setup for Cherryview
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 9 Apr 2014 10:28:01 +0000 (13:28 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 6 May 2014 16:29:34 +0000 (18:29 +0200)
commit39a6e07404691645a107398f05ce40bdcc2dd692
tree2c4d65b5eca42d26f7b0f006dd6e642bca4511f8
parentde8555b776389a924bc2c65e4072ee3efd99ad41
drm/i915/chv: PPAT setup for Cherryview

Ignore the cache bits in PPAT and just set the snoop bit where
appropriate. BDW WB is mapped to snooped access, while all other
modes are mapped to non-snooped access.

The hardware supposedly ignores everything except the snoop bit
in the PPAT entries.

Additionally the hardware actually enforces snooping for all
page table accesses, and thus the snoop bit is ignored for PDEs.

v2: Rebased on top of the bdw resume fix to reload the ppat entries.

v3: Rebase on top of the i915_gem_gtt.h header extraction.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)
Acked-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_gem_gtt.h