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(parent: e8f09a4) | patch
drm/msm/dpu: define interrupt register names
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sun, 16 May 2021 20:29:08 +0000 (23:29 +0300)
committerRob Clark <robdclark@chromium.org>
Wed, 23 Jun 2021 14:32:15 +0000 (07:32 -0700)
commit39299602a59f910c4b4a348e30266c241fc4b1f6
tree8b2b4356dc02526bf7274db213d66b759831992ctree | snapshot
parente8f09a46adfb99ef0dc5070027c7ef84c3fdf725commit | diff
drm/msm/dpu: define interrupt register names

In order to make mdss_irqs readable (and error-prone) define names for
interrupt register indices.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210516202910.2141079-4-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c diff | blob | history
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h diff | blob | history
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