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(parent: f8f071d) | patch
arm: socfpga: vining: Let DWMAC configure PHY reset GPIO
authorMarek Vasut <marex@denx.de>
Tue, 14 Sep 2021 03:25:36 +0000 (05:25 +0200)
committerMarek Vasut <marex@denx.de>
Wed, 22 Sep 2021 19:30:39 +0000 (21:30 +0200)
commit39174a701f66dd58f769cc8412686110de5be326
tree6faa43d2181870c18b5a47174f31304f7b770f0atree | snapshot
parentf8f071dd02eb7ad8a1e7dba09cb19f432c60b506commit | diff
arm: socfpga: vining: Let DWMAC configure PHY reset GPIO

The DM DWMAC driver is perfectly capable of configuring the ethernet
PHY reset GPIO, let the driver do it instead of doing it in the board
file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
board/softing/vining_fpga/socfpga.c diff | blob | history
"Das U-Boot" Source Tree.