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clk: exynos5433: Extend list of available AUD_PLL output frequencies
authorSylwester Nawrocki <s.nawrocki@samsung.com>
Mon, 12 Feb 2018 15:52:27 +0000 (16:52 +0100)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Wed, 14 Feb 2018 15:01:33 +0000 (16:01 +0100)
commit3805f7253f158e6b36cc92a64d42aeb53a35cba4
treea841d2293fdd37c3b71442569f30cee5ed004ffetree | snapshot
parent5210478e55c67c14031610d9fd4adfa5958baebccommit | diff
clk: exynos5433: Extend list of available AUD_PLL output frequencies

Add one more entry to the exynos5433_aud_pll_rates table, this allows
to support audio sample rates: 48000, 96000, 192000 Hz with minimum
error. The M, P, S, K values re confirmed by the HW team.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
drivers/clk/samsung/clk-exynos5433.c diff | blob | history
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