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(parent: 01bac3e) | patch
drm/i915/gvt: Detect 64K gtt entry by IPS bit of PDE
authorChangbin Du <changbin.du@intel.com>
Tue, 15 May 2018 02:35:36 +0000 (10:35 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Mon, 9 Jul 2018 02:23:04 +0000 (10:23 +0800)
commit36aee9a8e120e281e0adaf5db9a6cc165e3a5f17
tree08df1e5c0e9e52a0fc56b307728d835554c60f25tree | snapshot
parent01bac3e54e224c623f5eae4e7f0b9c70ee82b066commit | diff
drm/i915/gvt: Detect 64K gtt entry by IPS bit of PDE

This change help us detect the real entry type per PSE and IPS setting.
For 64K entry, we also need to check reg GEN8_GAMW_ECO_DEV_RW_IA.

v2: Extend IPS mmio control to Gen10. (Matthew Auld)

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/gtt.c diff | blob | history
drivers/gpu/drm/i915/gvt/gtt.h diff | blob | history
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