]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/gvt: Fix cached atomics setting for Windows VM
authorZhenyu Wang <zhenyuw@linux.intel.com>
Fri, 6 Aug 2021 04:40:56 +0000 (12:40 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Mon, 9 Aug 2021 06:42:09 +0000 (14:42 +0800)
commit355a82d620d5fd01e7e4cd36909e5d203799b5ba
treef6c9c8719898cd2fcffee2e3ee038d94b7b30e1b
parent12a735dced4f03e7b98ac7ca477844a82abb4ffd
drm/i915/gvt: Fix cached atomics setting for Windows VM

We've seen recent regression with host and windows VM running
simultaneously that cause gpu hang or even crash. Finally bisect to
commit 6bde7ba07b0b ("drm/i915: Disable atomics in L3 for gen9"),
which seems cached atomics behavior difference caused regression
issue.

This tries to add new scratch register handler and add those in mmio
save/restore list for context switch. No gpu hang produced with this one.

Cc: stable@vger.kernel.org # 5.12+
Cc: "Xu, Terrence" <terrence.xu@intel.com>
Cc: "Bloomfield, Jon" <jon.bloomfield@intel.com>
Cc: "Ekstrand, Jason" <jason.ekstrand@intel.com>
Reviewed-by: Colin Xu <colin.xu@intel.com>
Fixes: 6bde7ba07b0b ("drm/i915: Disable atomics in L3 for gen9")
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210806044056.648016-1-zhenyuw@linux.intel.com
drivers/gpu/drm/i915/gvt/handlers.c
drivers/gpu/drm/i915/gvt/mmio_context.c