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gianfar: Remove redundant programming of [rt]xic registers
authorClaudiu Manoil <claudiu.manoil@freescale.com>
Tue, 19 Mar 2013 07:40:04 +0000 (07:40 +0000)
committerDavid S. Miller <davem@davemloft.net>
Wed, 20 Mar 2013 17:21:52 +0000 (13:21 -0400)
commit32f7598fd91f5f50e4e77eceefb92a2747d12a1a
tree4c51232b94ee418c4021c65d4de8008c5b14be7dtree | snapshot
parent50fba00dd88ee75653bc4879af3d12747f25075acommit | diff
gianfar: Remove redundant programming of [rt]xic registers

For Multi Q Multi Group (MQ_MG_MODE) mode, the Rx/Tx colescing registers [rt]xic
are aliased with the [rt]xic0 registers (coalescing setting regs for Q0). This
avoids programming twice in a row the coalescing registers for the Rx/Tx hw Q0.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/freescale/gianfar.c diff | blob | history
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