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(parent: 4bc040c) | patch
iio: dac: ad5764: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:56:32 +0000 (18:56 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:16 +0000 (11:53 +0100)
commit31fb7cd35ed584edabcc421033bb6f4d5212dd3c
treee03ac6e26bf0b055a41183720a89387c1e9675a8tree | snapshot
parent4bc040c34d3e7d4d15242eadc7a855ec47ae7df8commit | diff
iio: dac: ad5764: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 4e6106594176 ("staging:iio:dac: Add AD5764 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-53-jic23@kernel.org
drivers/iio/dac/ad5764.c diff | blob | history
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