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(parent: c2f94dd) | patch
arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask
authorLey Foon Tan <ley.foon.tan@intel.com>
Wed, 15 Aug 2018 18:20:17 +0000 (02:20 +0800)
committerMarek Vasut <marex@denx.de>
Wed, 15 Aug 2018 10:41:09 +0000 (12:41 +0200)
commit30e6b47c9b352d4c4b3a7e09b2f2deab57702a60
treea22bf2d8876bc28499b37a22572468d0c16d255dtree | snapshot
parentc2f94dd58c30c70854396c4f3a41e02b6cdac4dacommit | diff
arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask

Bitmask for EMAC should be bit-0, EMAC1 bit-8 and EMAC2 bit-16.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
arch/arm/mach-socfpga/include/mach/system_manager_s10.h diff | blob | history
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