]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: extract intel_set_pipe_timings from crtc_mode_set
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Mon, 1 Oct 2012 21:10:53 +0000 (18:10 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 2 Oct 2012 11:24:37 +0000 (13:24 +0200)
commit2eda7bb1395a0bbadb71d6e958c8006b1beaaf0c
treeb683f553f6deaaee484cdfd9782a001fe9263351
parent4e93f0f2b27d733b05d69dea9d07478e924c2baf
drm/i915: extract intel_set_pipe_timings from crtc_mode_set

Version 2: call intel_set_pipe_timings from both i9xx_crtc_mode_set
and ironlake_crtc_mode_set, instead of just ironlake, as requested by
Daniel Vetter.

The problem caused by calling this function from i9xx_crtc_mode_set
too is that now on i9xx we write to PIPESRC before writing to DSPSIZE
and DSPPOS. I could not find any evidence in our documentation that
this won't work, and the docs actually say the pipe registers should
be set before the plane registers.

Version 3: don't remove pipeconf bits on i9xx_crtc_mode_set.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c