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(parent: 21a9e9f) | patch
drm/i915/dsi: add support for DSI PLL N1 divisor values
authorJani Nikula <jani.nikula@intel.com>
Wed, 13 May 2015 07:35:25 +0000 (10:35 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 20 May 2015 09:25:58 +0000 (11:25 +0200)
commit2e0367769696a1f466204bc2774512a7c8eb0e3d
tree84282d94eb224dc9b26b9fb99a9645681c4ae9bctree | snapshot
parent21a9e9f32f2502c62374d112959714d0b209493acommit | diff
drm/i915/dsi: add support for DSI PLL N1 divisor values

Currently DSI PLL N1 is hardcoded off. Make it possible to use it
later. This should have no functional changes for now.

v2: s/ffz(~(n))/ffs(n) - 1/ (Ville)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dsi_pll.c diff | blob | history
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