]> git.baikalelectronics.ru Git - kernel.git/commit
drm: rcar-du: Cache DSYSR value to ensure known initial value
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Wed, 22 Aug 2018 13:05:02 +0000 (16:05 +0300)
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Mon, 24 Sep 2018 21:41:04 +0000 (00:41 +0300)
commit2df6eb1b510e586cef6c830d555bcdb02fa1086c
treec4c17a883b3ad5bfd38c27fcf08c9e2f89a64be8
parentfefdd0a9c933f70193748e2b3b462b5cfbdff1ff
drm: rcar-du: Cache DSYSR value to ensure known initial value

DSYSR is a DU channel register that also contains group fields. It is
thus written to by both the group and CRTC code, using read-update-write
sequences. As the register isn't initialized explicitly at startup time,
this can lead to invalid or otherwise unexpected values being written to
some of the fields if they have been modified by the firmware or just
not reset properly.

To fix this we can write a fully known value to the DSYSR register when
turning a channel's functional clock on. However, the mix of group and
channel fields complicate this. A simpler solution is to cache the
register and initialize the cached value to the desired hardware
defaults.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
drivers/gpu/drm/rcar-du/rcar_du_crtc.c
drivers/gpu/drm/rcar-du/rcar_du_crtc.h
drivers/gpu/drm/rcar-du/rcar_du_group.c