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(parent: a0f74a5) | patch
ARM: dts: sama7g5ek: fix TXC pin configuration
authorNicolas Ferre <nicolas.ferre@microchip.com>
Fri, 30 Oct 2020 17:33:14 +0000 (18:33 +0100)
committerEugen Hristev <eugen.hristev@microchip.com>
Thu, 7 Jan 2021 07:44:16 +0000 (09:44 +0200)
commit2d9c39cd0086e96a8950dec609211b92a22ed083
treeb087fbcc76216b0db2e838e399656ea42567be88tree | snapshot
parenta0f74a5e43477795e4fcd430d25adbc882736077commit | diff
ARM: dts: sama7g5ek: fix TXC pin configuration

TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
arch/arm/dts/sama7g5ek.dts diff | blob | history
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