]> git.baikalelectronics.ru Git - kernel.git/commit
MIPS: Loongson-3: Add CSR IPI support
authorHuacai Chen <chenhc@lemote.com>
Sat, 21 Sep 2019 13:50:28 +0000 (21:50 +0800)
committerPaul Burton <paul.burton@mips.com>
Mon, 7 Oct 2019 16:45:25 +0000 (09:45 -0700)
commit2afee3925c54890bd93dc4ae6ee9e760461d6c03
tree62f53ff0b13e1555ee955e373b6adad54db1bc3c
parenta984a7901e0d8739b0ca254bb5d8e046c974fd8b
MIPS: Loongson-3: Add CSR IPI support

CSR IPI and legacy MMIO use the same infrastructure, but CSR IPI is
faster than legacy MMIO IPI. This patch enable CSR IPI if possible
(except for MailBox, because CSR IPI is too complicated for MailBox).

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: Huacai Chen <chenhuacai@gmail.com>
arch/mips/loongson64/loongson-3/smp.c