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(parent: 4adc280) | patch
clk: tegra: Initialize DSI low-power clocks
authorThierry Reding <thierry.reding@gmail.com>
Mon, 18 Nov 2013 15:11:36 +0000 (16:11 +0100)
committerPeter De Schrijver <pdeschrijver@nvidia.com>
Tue, 26 Nov 2013 16:46:58 +0000 (18:46 +0200)
commit29898d469505d2086201858c68835c096ba2cb21
tree6c488cf25b168ad13342a24ea69fac2ddcc92679tree | snapshot
parent4adc280590d57fb7ffb05fec7c38d36d94ded9e7commit | diff
clk: tegra: Initialize DSI low-power clocks

The low-power DSI clocks are used during host-driven transactions on the
DSI bus. Documentation recommends that they be children of PLLP and run
at a frequency of at least 52 MHz.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra114.c diff | blob | history
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