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clk: renesas: Add support for R9A07G044 SoC
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Wed, 9 Jun 2021 15:32:28 +0000 (16:32 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 10 Jun 2021 13:46:46 +0000 (15:46 +0200)
commit27424d18c1004a99fb21207021d952398d9bd23f
tree888ed51b675da2a5fef45bf8bd94e7f7ad1f9daftree | snapshot
parent7d414712d7127ae27604dbc224c6a27b5a092afecommit | diff
clk: renesas: Add support for R9A07G044 SoC

Define the clock outputs supported by RZ/G2L (R9A07G044) SoC
and bind it with RZ/G2L CPG core.

Based on a patch in the BSP by Binh Nguyen
<binh.nguyen.jz@renesas.com>.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609153230.6967-10-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/Kconfig diff | blob | history
drivers/clk/renesas/Makefile diff | blob | history
drivers/clk/renesas/r9a07g044-cpg.c [new file with mode: 0644] blob
drivers/clk/renesas/renesas-rzg2l-cpg.c diff | blob | history
drivers/clk/renesas/renesas-rzg2l-cpg.h diff | blob | history
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