]> git.baikalelectronics.ru Git - kernel.git/commit
arm64: Add tlbi_user_level TLB invalidation helper
authorZhenyu Ye <yezhenyu2@huawei.com>
Thu, 25 Jun 2020 08:03:11 +0000 (16:03 +0800)
committerCatalin Marinas <catalin.marinas@arm.com>
Tue, 7 Jul 2020 10:23:46 +0000 (11:23 +0100)
commit24a9dfd6eb650c2540a300f8bf959e6f3057aa56
tree15acf246fe406eae95a9b79b2704a5f16bcbca09
parent56803bd7670821098245c0db7c71ab1b6b83e069
arm64: Add tlbi_user_level TLB invalidation helper

Add a level-hinted parameter to __tlbi_user, which only gets used
if ARMv8.4-TTL gets detected.

ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate
the level of translation table walk holding the leaf entry for the
address that is being invalidated.

This patch set the default level value of flush_tlb_range() to 0,
which will be updated in future patches.  And set the ttl value of
flush_tlb_page_nosync() to 3 because it is only called to flush a
single pte page.

Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
Link: https://lore.kernel.org/r/20200625080314.230-4-yezhenyu2@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/tlbflush.h