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clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller
authorBiju Das <biju.das.jz@bp.renesas.com>
Sun, 1 May 2022 08:34:47 +0000 (09:34 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 5 May 2022 10:10:21 +0000 (12:10 +0200)
commit1cf389ee8e2644ee01a18292cc9950a3ab354c2e
treefbb4a46720bcee2cac70cacae3b984b44b177993tree | snapshot
parentbbb47206e22d199181f2232bcd9906f59eb60fd6commit | diff
clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller

Add clock and reset entries for SPI Multi I/O Bus Controller.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220501083450.26541-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g043-cpg.c diff | blob | history
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