tools headers: Sync x86 cpufeatures.h with the kernel sources

tools headers: Sync x86 cpufeatures.h with the kernel sources

To pick up changes found in these csets:

 3451acf8c024 x86/speculation: Add virtualized speculative store bypass disable support
 b60b0231e4ec x86/cpufeatures: Add FEATURE_ZEN
 170832076756 x86/cpufeatures: Disentangle SSBD enumeration
 b51935aa69e4 x86/cpufeatures: Disentangle MSR_SPEC_CTRL enumeration from IBRS
 675d24fc6b33 x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP
 b2eaf4cdd696 x86/bugs: Rename _RDS to _SSBD
 dcf7b5152170 x86/bugs/AMD: Add support to disable RDS on Fam[15,16,17]h if requested
 fa465c534a40 x86/bugs: Provide boot parameters for the spec_store_bypass_disable mitigation
 5de3a044e5f2 x86/cpufeatures: Add X86_FEATURE_RDS
 4e0d783f445e x86/bugs: Expose /sys/../spec_store_bypass

The usage of this file in tools doesn't use the newly added X86_FEATURE_
defines:

  CC       /tmp/build/perf/bench/mem-memcpy-x86-64-asm.o
  CC       /tmp/build/perf/bench/mem-memset-x86-64-asm.o
  LD       /tmp/build/perf/bench/perf-in.o
  LD       /tmp/build/perf/perf-in.o

Silencing this perf build warning:

  Warning: Kernel ABI header at 'tools/arch/x86/include/asm/cpufeatures.h' differs from latest version at 'arch/x86/include/asm/cpufeatures.h'

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Wang Nan <wangnan0@huawei.com>
Link: https://lkml.kernel.org/n/tip-mrwyauyov8c7s048abg26khg@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>