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(parent: 550fe6c) | patch
drm/amdgpu: enable mode1 reset
authorWenhui Sheng <Wenhui.Sheng@amd.com>
Mon, 13 Jul 2020 07:15:11 +0000 (15:15 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 15 Jul 2020 16:41:54 +0000 (12:41 -0400)
commit1c52610fccd9ef455f4ec23450b80b310e760d2a
treef9f0251562be8eebe89be6c9f3f9a7c9b4b28061tree | snapshot
parent550fe6cb22859f3b21fa7f1421bc954d2f3f3df1commit | diff
drm/amdgpu: enable mode1 reset

For sienna cichlid, add mode1 reset path for sGPU.

v2: hiding MP0/MP1 mode1 reset under AMD_RESET_METHOD_MODE1
v3: split emergency restart logic to a new patch

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/nv.c diff | blob | history
drivers/gpu/drm/amd/powerplay/navi10_ppt.c diff | blob | history
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c diff | blob | history
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