]> git.baikalelectronics.ru Git - kernel.git/commit
arm64/kvm: Prohibit guest LOR accesses
authorMark Rutland <mark.rutland@arm.com>
Tue, 13 Feb 2018 13:39:23 +0000 (13:39 +0000)
committerChristoffer Dall <christoffer.dall@linaro.org>
Mon, 26 Feb 2018 09:48:01 +0000 (10:48 +0100)
commit1c35078c3b5ac7de7fa22c146e80b599199b28d6
treec472adcc207a916a352a3ce9038e01885208c2b2
parentbbe11a1155cbc6079fdd2c18f95f119157e6b7ca
arm64/kvm: Prohibit guest LOR accesses

We don't currently limit guest accesses to the LOR registers, which we
neither virtualize nor context-switch. As such, guests are provided with
unusable information/controls, and are not isolated from each other (or
the host).

To prevent these issues, we can trap register accesses and present the
illusion LORegions are unssupported by the CPU. To do this, we mask
ID_AA64MMFR1.LO, and set HCR_EL2.TLOR to trap accesses to the following
registers:

* LORC_EL1
* LOREA_EL1
* LORID_EL1
* LORN_EL1
* LORSA_EL1

... when trapped, we inject an UNDEFINED exception to EL1, simulating
their non-existence.

As noted in D7.2.67, when no LORegions are implemented, LoadLOAcquire
and StoreLORelease must behave as LoadAcquire and StoreRelease
respectively. We can ensure this by clearing LORC_EL1.EN when a CPU's
EL2 is first initialized, as the host kernel will not modify this.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Vladimir Murzin <vladimir.murzin@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
arch/arm64/include/asm/kvm_arm.h
arch/arm64/include/asm/sysreg.h
arch/arm64/kernel/head.S
arch/arm64/kvm/sys_regs.c