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ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
authorChen-Yu Tsai <wens@csie.org>
Wed, 31 May 2017 07:58:22 +0000 (15:58 +0800)
committerChen-Yu Tsai <wens@csie.org>
Sat, 3 Jun 2017 02:04:48 +0000 (10:04 +0800)
commit1bb3490363a495924d607b92dd1c69bc280a7278
tree1c7dd20d2c1ab0871237e61dbc47a02e8fb62af6tree | snapshot
parent9ac703983b7c45b70eabf9063d33c3fc0050b618commit | diff
ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU

The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sunxi-h3-h5.dtsi diff | blob | history
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