iommu/amd: Fix the configuration of GCR3 table root pointer

iommu/amd: Fix the configuration of GCR3 table root pointer

[ Upstream commit 0df47da6115c9e8ffd06a86fa6fa98bdebe52b32 ]

The SPA of the GCR3 table root pointer[51:31] masks 20 bits. However,
this requires 21 bits (Please see the AMD IOMMU specification).
This leads to the potential failure when the bit 51 of SPA of
the GCR3 table root pointer is 1'.

Signed-off-by: Adrian Huang <ahuang12@lenovo.com>
Fixes: a0fbfcf660937 ("iommu/amd: Add support for IOMMUv2 domain mode")
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>