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(parent: 1b80502) | patch
drm/i915: PLL registers need an offset on VLV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 25 Jan 2013 19:44:41 +0000 (21:44 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Sat, 26 Jan 2013 16:29:45 +0000 (17:29 +0100)
commit14b14c49ef2162755d0feb6db15f70d934ee54ac
tree5dda4cb528b994e35bca8674c4e28848cf69bfe2tree | snapshot
parent1b805020194446b95bc32acd0f3441d69c4e9fb1commit | diff
drm/i915: PLL registers need an offset on VLV

v2: Dropped the clock gating registers

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
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