]> git.baikalelectronics.ru Git - arm-tf.git/commit
feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable...
authorSieu Mun Tang <sieu.mun.tang@intel.com>
Thu, 5 May 2022 09:07:21 +0000 (17:07 +0800)
committerSieu Mun Tang <sieu.mun.tang@intel.com>
Thu, 5 May 2022 14:58:03 +0000 (22:58 +0800)
commit11f4f03043ef05762f4d6337804c39dc8f9af54f
tree7b076c1659bd455c02bd0f0f3e38da13dad6eac7
parentb7bd9863dc2f0a055e0c4bc065e071c4b1863647
feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
plat/intel/soc/agilex/bl2_plat_setup.c
plat/intel/soc/agilex/include/socfpga_plat_def.h
plat/intel/soc/common/include/socfpga_f2sdram_manager.h [new file with mode: 0644]
plat/intel/soc/common/include/socfpga_reset_manager.h
plat/intel/soc/common/include/socfpga_sip_svc.h
plat/intel/soc/common/include/socfpga_system_manager.h
plat/intel/soc/common/soc/socfpga_reset_manager.c
plat/intel/soc/common/socfpga_sip_svc.c
plat/intel/soc/n5x/include/socfpga_plat_def.h
plat/intel/soc/stratix10/bl2_plat_setup.c
plat/intel/soc/stratix10/include/socfpga_plat_def.h