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(parent: c62e55a) | patch
drm/radeon: apply more strict limits for PLL params v2
authorChristian König <christian.koenig@amd.com>
Fri, 4 Apr 2014 11:45:42 +0000 (13:45 +0200)
committerChristian König <christian.koenig@amd.com>
Thu, 17 Apr 2014 11:59:46 +0000 (13:59 +0200)
commit11669432fca4d23524287847a85884e29bd7e311
tree16b573a64725153bf6202164f383012c4da2d5f8tree | snapshot
parentc62e55a5344473074ec35e796359d995ef93613dcommit | diff
drm/radeon: apply more strict limits for PLL params v2

Letting post and refernce divider get to big is bad for signal stability.

v2: increase the limit to 210

Signed-off-by: Christian König <christian.koenig@amd.com>
drivers/gpu/drm/radeon/radeon_display.c diff | blob | history
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