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(parent: cd3a1d0) | patch
clk: agilex: Additional membus writes for HPS PLL
authorChee Hong Ang <chee.hong.ang@intel.com>
Fri, 10 Jul 2020 12:55:23 +0000 (20:55 +0800)
committerLey Foon Tan <ley.foon.tan@intel.com>
Fri, 9 Oct 2020 09:53:10 +0000 (17:53 +0800)
commit1141e5c8e8691874d16139ea2003af1dedb76363
tree91bfc556a3da45728269bdf3eb44506b5d10f9a5tree | snapshot
parentcd3a1d0e21c4f147ef09c465eb1c0ccc2ca40e21commit | diff
clk: agilex: Additional membus writes for HPS PLL

Add additional membus writes to configure main and peripheral PLL
for Agilex's clock manager.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
drivers/clk/altera/clk-agilex.c diff | blob | history
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