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(parent: af5208e) | patch
clk: k210: Fix PLLs not being enabled
authorSean Anderson <seanga2@gmail.com>
Fri, 9 Apr 2021 02:13:04 +0000 (22:13 -0400)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Fri, 14 May 2021 08:20:47 +0000 (16:20 +0800)
commit10b28c250c2f30f47a0177ad16f43c412d9e32ac
treeadcffc10cdb141a5aabfc93836602df271c71f7ctree | snapshot
parentaf5208eedc286fdb5698bb1d87a642ca7ac4c5f6commit | diff
clk: k210: Fix PLLs not being enabled

After starting or setting the rate of a PLL, the enable bit must be set.

This fixes a bug where the AI ram would not be accessible, because it
requires PLL1 to be running.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Damien Le Moal <damien.lemoal@wdc.com>
drivers/clk/kendryte/pll.c diff | blob | history
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