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arm64: dts: mt7622: specify the L2 cache topology
authorRui Salvaterra <rsalvaterra@gmail.com>
Thu, 28 Apr 2022 22:57:55 +0000 (23:57 +0100)
committerMatthias Brugger <matthias.bgg@gmail.com>
Fri, 13 May 2022 11:27:40 +0000 (13:27 +0200)
commit108f410e16a16d9ae79779ac005104b76b5f3999
tree3175beeec61025243441612e4ce79a86c952b567tree | snapshot
parent5c8bf3cf851f4692bde79abcbf5648bdc21c245ecommit | diff
arm64: dts: mt7622: specify the L2 cache topology

On an MT7622 system, the kernel complains of not being able to detect the cache
hierarchy of CPU 0. Specify the shared L2 cache node in the device tree, in
order to fix this.

Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Link: https://lore.kernel.org/r/20220428225755.785153-1-rsalvaterra@gmail.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt7622.dtsi diff | blob | history
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