]> git.baikalelectronics.ru Git - kernel.git/commit
net/mlx5: DR, Use the right size when writing partial STE into HW
authorYevgeny Kliteynik <kliteyn@nvidia.com>
Tue, 22 Sep 2020 01:23:58 +0000 (04:23 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Sat, 30 Jan 2021 02:12:52 +0000 (18:12 -0800)
commit105e7e150515d12dd5d780ad3feb5c99d121d2f1
treec318012e6de56d8caf0dbff0914bb08c6c02b259
parenta234a259caf365010c822bcc0dcf78d781cecbe7
net/mlx5: DR, Use the right size when writing partial STE into HW

In these cases we need to update only the ctrl area of the STE.
So it is better to write only the control 32B and avoid copying
the unneeded reduced 48B (control 32B + tag 16B).

Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Signed-off-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c