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PCI: xilinx: Clear interrupt register for invalid interrupt
authorBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Thu, 1 Sep 2016 10:14:42 +0000 (15:44 +0530)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 13 Sep 2016 15:38:19 +0000 (10:38 -0500)
commit0fcba97633f11b85185ab9215fd997b84dd4b2d6
tree8c02857a2f569c5a83e97f5626242b8185d97178tree | snapshot
parent2a8249af7135432793ac9013aae76b2bdeb63b60commit | diff
PCI: xilinx: Clear interrupt register for invalid interrupt

The interrupt decode register is not being cleared if an invalid interrupt
arises.  Clear the decode register in this case.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
drivers/pci/host/pcie-xilinx.c diff | blob | history
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