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(parent: bb32542) | patch
iio: frequency: admv4420: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:56:50 +0000 (18:56 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:18 +0000 (11:53 +0100)
commit0f2fd6f53698905d3d5bb783735a2246eb9d5cfa
treec7dcbb907ebd75fddd6b08a0a09fb9719eb4243etree | snapshot
parentbb325426322a3f1db68a7a138e60ce66a1f04a64commit | diff
iio: frequency: admv4420: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: cec25820d758 ("iio: frequency: admv4420.c: Add support for ADMV4420")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-71-jic23@kernel.org
drivers/iio/frequency/admv4420.c diff | blob | history
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