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(parent: 2c3b76c) | patch
DSU: Implement workaround for errata 798953
authorLouis Mayencourt <louis.mayencourt@arm.com>
Tue, 9 Apr 2019 15:29:01 +0000 (16:29 +0100)
committerLouis Mayencourt <louis.mayencourt@arm.com>
Wed, 17 Apr 2019 12:46:43 +0000 (13:46 +0100)
commit0e985d708e8f429c1fa1f557d3eea90e32de5228
tree1fcdb2dc74d4f1f127a9360319f3426e37c2dbf5tree | snapshot
parent2c3b76ce7b9e36e5c8be3c454110e070a20332cacommit | diff
DSU: Implement workaround for errata 798953

Under certain near idle conditions, DSU may miss response transfers on
the ACE master or Peripheral port, leading to deadlock. This workaround
disables high-level clock gating of the DSU to prevent this.

Change-Id: I820911d61570bacb38dd325b3519bc8d12caa14b
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
docs/cpu-specific-build-macros.rst diff | blob | history
include/lib/cpus/aarch64/dsu_def.h diff | blob | history
lib/cpus/aarch64/cortex_a55.S diff | blob | history
lib/cpus/aarch64/cortex_a75.S diff | blob | history
lib/cpus/aarch64/cortex_a76.S diff | blob | history
lib/cpus/aarch64/dsu_helpers.S diff | blob | history
lib/cpus/cpu-ops.mk diff | blob | history
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