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(parent: d48d68b) | patch
drm/amd/display: Fix incorrect backlight register offset for DCN
authorDavid Galiffi <David.Galiffi@amd.com>
Thu, 3 Sep 2020 23:20:36 +0000 (19:20 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 22 Sep 2020 16:27:10 +0000 (12:27 -0400)
commit0cecfbdc861a6ac6311e17390470f35320df814b
treeb2fd7703ba1cf57f388dc4f826ec09a59cca0fb2tree | snapshot
parentd48d68b684a547a937a765459f02aba8847a7e2acommit | diff
drm/amd/display: Fix incorrect backlight register offset for DCN

[Why]
Typo in backlight refactor introduced wrong register offset.

[How]
SR(BIOS_SCRATCH_2) to NBIO_SR(BIOS_SCRATCH_2).

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: <stable@vger.kernel.org>
drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h diff | blob | history
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