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(parent: f9de9a4) | patch
drm/i915/glk: Validate only DSI PORT A PLL divider
authorMadhav Chauhan <madhav.chauhan@intel.com>
Fri, 17 Feb 2017 12:43:35 +0000 (18:13 +0530)
committerJani Nikula <jani.nikula@intel.com>
Tue, 28 Feb 2017 09:54:52 +0000 (11:54 +0200)
commit0ca62a84f01796c415c69e319fcbbd198ff9056f
tree0c8a5572c596e0332f7bd4fa6029ec46718f06d1tree | snapshot
parentf9de9a40fb7cc2d508a6121aff2a5d0eb6783dfbcommit | diff
drm/i915/glk: Validate only DSI PORT A PLL divider

As per BSPEC, GLK supports MIPI DSI 8X clk only on PORT A.
Therefore only for PORT A PLL divider value should be validated.

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1487335415-14766-8-git-send-email-madhav.chauhan@intel.com
drivers/gpu/drm/i915/intel_dsi_pll.c diff | blob | history
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