]> git.baikalelectronics.ru Git - kernel.git/commit
clk: renesas: r8a779a0: Fix R and OSC clocks
authorGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 9 Nov 2020 15:26:14 +0000 (16:26 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 10 Dec 2020 07:34:01 +0000 (08:34 +0100)
commit0aa345ba0ebf13a4271ebea3383139dbc1ac062f
treec92337362caa9059dbc82416cbf8c5b0ad1cc6a0
parentaebfb8c122631e90b0e92bda14ab47b19eb5c9fe
clk: renesas: r8a779a0: Fix R and OSC clocks

The R-Car V3U clock driver defines the R and OSC clocks using R-Car Gen3
clock types.  However, The R-Car V3U clock driver does not use the R-Car
Gen3 clock driver core, hence registering the R and OSC clocks fails:

    renesas-cpg-mssr e6150000.clock-controller: Failed to register core clock osc: -22
    renesas-cpg-mssr e6150000.clock-controller: Failed to register core clock r: -22

Fix this by introducing clock definition macros specific to R-Car V3U.
Note that rcar_r8a779a0_cpg_clk_register() already handled the related
clock types.  Drop the now unneeded include of rcar-gen3-cpg.h.

Fixes: 3a55c774f1ec1cc4 ("clk: renesas: cpg-mssr: Add support for R-Car V3U")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201109152614.2465483-1-geert+renesas@glider.be
drivers/clk/renesas/r8a779a0-cpg-mssr.c