]> git.baikalelectronics.ru Git - kernel.git/commit
drm/amd/display: Program VTG params after programming Global Sync for DCN2
authorJoshua Aberback <joshua.aberback@amd.com>
Mon, 29 Apr 2019 21:21:19 +0000 (17:21 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 22 Jun 2019 14:34:07 +0000 (09:34 -0500)
commit09e7099c01123de1801ca074073beaad9539bf4c
treeac53e14b0ca868b1fbbb14bba24149961c3c02b9
parent1a324602ad4d43c247850ce362d09488dd00890c
drm/amd/display: Program VTG params after programming Global Sync for DCN2

[Why]
VTG has a parameter FP2, which is defined as:
    if VSTARTUP is before VSYNC:
        FP2 = number of lines in between VSTARTUP and VSYNC
    else
        FP2 = 0
Currently, FP2 is only programmed during "program_timing". However, the
position of VSTARTUP is affected by the prefetching requirements on all pipes,
so the position might change when we do memory request control on another pipe, so we need
to make sure that FP2 stays up-to-date whenever we adjust VSTARTUP.

[How]
 - refactor VTG_CONTROL programming into a new function "set_vtg_params"
 - call it after calling "program_global_sync"
   - make sure it's called after because it relies on the cached dlg params

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Jun Lei <Jun.Lei@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c