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(parent: bed0b0c) | patch
powerpc: Expose TSCR via sysfs
authorAnton Blanchard <anton@samba.org>
Thu, 7 Sep 2017 17:11:12 +0000 (03:11 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Sun, 21 Jan 2018 18:48:36 +0000 (05:48 +1100)
commit05c05107caac4bf7796e0887370162ef8f09ecff
tree5dec89635915a9a52d2b76d4a5888994181e7da3tree | snapshot
parentbed0b0c034dc43d2e54640cc1d418d1a822ab64ecommit | diff
powerpc: Expose TSCR via sysfs

The thread switch control register (TSCR) is a per core register
that configures how the CPU shares resources between SMT threads.

Exposing it via sysfs allows us to tune it at run time.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/kernel/sysfs.c diff | blob | history
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