]> git.baikalelectronics.ru Git - uboot.git/commit
projects / uboot.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: d8556b1) | patch
phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as a clock
authorAswath Govindraju <a-govindraju@ti.com>
Fri, 28 Jan 2022 08:11:36 +0000 (13:41 +0530)
committerTom Rini <trini@konsulko.com>
Tue, 8 Feb 2022 16:00:03 +0000 (11:00 -0500)
commit017d6b63f080b4684f852b6a0a35adcf672b9ff4
treedff7f5464313f1fef0434104682d2ef76632baaftree | snapshot
parentd8556b1f3cb29a885785c459d0b41f3918ec62c8commit | diff
phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as a clock

Sierra has two PLLs, PLL_CMNLC and PLL_CMNLC1 and each of these PLLs has
two inputs, plllc_refclk (input from pll0_refclk) and refrcv (input from
pll1_refclk). Model PLL_CMNLC and PLL_CMNLC1 as a clock so that it's
possible to select one of these two inputs from device tree.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
drivers/phy/cadence/phy-cadence-sierra.c diff | blob | history
"Das U-Boot" Source Tree.